POET Technologies Inc.

The content is way above my head, but it obviously looks like an important patent granted just 15 months after it was filed.

Patent number: 9450124
Abstract: A method of forming an integrated circuit employs a plurality of layers supported on a substrate that include i) n-type contact layer, ii) a p-type modulation doped quantum well structure (MDQWS) above the n-type contact layer, iii) n-type MDQWS above the p-type MDQWS, and iv) p-type contact layer(s) above the n-type MDQWS. A feature for a thyristor is defined by a mesa at the p-type contact layer of iv). A first layer of metal is deposited on the feature, which is then etched for at least one other device. Additional layer(s) of metal is deposited on the feature to form cumulative metal layers, which are etched away to form a set of mesas and corresponding electrodes for the thyristor. The cumulative metal layers that cover the feature and contact the mesa at the p-type contact layer of iv) are patterned to form an anode electrode of the thyristor.
Type: Grant
Filed: June 11, 2015
Date of Patent: September 20, 2016
Assignees: Opel Solar, Inc., THE UNIVERSITY OF CONNECTICUT
Inventor: Geoff W. Taylor
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Mironclaw
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POET Technologies Inc.
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PTK
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TSX-V
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