POET Technologies Inc.

The POET Short Reach and Very Short Reach data link whitepaper based on the POET Digital Opto-Electronic Switch has a great deal of information on what is available in the industry today. There is experimentation going on today to try and produce a T-VCSEL. The following description is from a patent on this device:

Single-channel data rates of 40 Gbit/s and beyond are, e.g., presently considered for both local area networks and interconnects. Due to the tough requirements on cost- and power-efficiency, vertical-cavity surface-emitting lasers (VCSELs) are the preferred light-sources for these applications. Whereas VCSELs have been demonstrated with 3 dB-bandwidth of 28 GHz, see ref [17] and VCSEL-based optical links with modulation speeds up to 55 Gbit/s [18], this is approaching fundamental limits. To reach such high and even higher modulation rates over an extended temperature range and with sufficient output power, radically new design concepts are required. Transistor-VCSELs (T-VCSELs) and their potential for high-speed modulation were evaluated numerically by Shi et al. [14], and very recently the first experimental demonstration of a T-VCSEL at low temperature was reported [20], including the voltage controlled operation of such lasers [21].

Below is an abstract from a Thesis on the subject.

The ever-increasing demand for broadband capacity of the global optical communication networks puts enormous requirements on the semiconductor laser used in the optical transmitter. Industrial standard bodies for optical communication project requirements of single-channel data rates as high as 100 Gbit/s around year 2020. This is a significant step with respect to today's technology which is only at the verge of introducing 25 Gbit/s emitters. The preferred light source for these applications is the vertical-cavity surface-emitting laser (VCSEL) which can offer cost- and power-efficient directly modulated operation. However, it has proven extremely difficult to push the modulation bandwidth of VCSELs beyond 30 GHz and radically new device concepts are demanded to meet the upcoming needs. One such new device paradigm consists of the transistor laser which is the fusion of a semiconductor laser and a high-speed heterojunction bipolar transistor (HBT) into a single device, with potential significant advantages in modulation bandwidth, noise properties and novel functionality by virtue of the three-terminal configuration. The present thesis deals with the design, fabrication and analysis of vertical-cavity surface-emitting transistor-lasers (T-VCSELs), a device previously not realized or investigated in great detail.

http://www.diva-portal.org/smash/get/diva2:768029/FULLTEXT01.pdf

The reason I am highlighting the above effort is to try to gain an understanding of just how unique the POET structure is. The Digital Opto-Electronic Switch/thyristor structure is part of the entire family of POET devices. It is the foundation of the POET memory cell and is also the structure used for the Single Electron Transistor for quantum computing. In terms of VCSEL operation I have read (in one the patents) that the VCSEL structure is capable of modulation at 100 GHz (I spent an hour trying to find that note and will resume my search when I have time).

I truly believe that partners are very eager to see what POET can do. When Suresh presents at CS International to people who are at the cutting edge of industry I think he is going to turn a lot of heads.

Back to something easy to grasp in terms of what differentiates POET.

In the whitepaper:

the POET VCSEL is single mode, it is further expected that using the POET VCSEL with SMF will allow a data rate of 25Gbps per channel up to 500m. This solution would provide a very attractive single chip alternative to existing SiP approaches.

Now check out slide 6 in this presentation:

file:///C:/Users/John%20Fairchild/Downloads/20150414_H13_Martin.pdf

Note that at 25Gbps max distance for the VCSEL is 100 meters due to multi-mode limitations. POET is quoting a data rate of 25Gbps per channel up to 500m.

Now for those of you who are still with me. In the whitepaper this statement is made:

Compared to traditional VCSEL based links, integration to realize a single chip to replace the current 4-chip solution substantially simplifies and reduces both the IC costs and the packaging cost. More importantly, the complete monolithic integration can provide up to an order of magnitude improvement in total power consumption. The speed parameters also favor higher speed performance compared to traditional VCSEL-based data link capabilities for MMF based short reach applications.

Now check this video from one of the leading technologies in this area. I was really surprised to see that they were using 3 inch wafers to produce the VCSEL and also note the large number of steps required in the epitaxial process. 200 layers? That is a lot and might be the reason they have not gone to a larger wafer?

The point I am highlighting is that POET references the current 4 chip solution and this fabrication video verifies this statement.

https://www.youtube.com/watch?v=u1HS4eyYV-k