Suresh Venkatesan has stated unequivocally in the September 30 call that, in order to leverage POET's technological advantage, it must have a demonstrative device. That prototype will be available by the second half of 2016, if not sooner. For fun, I will call it the TC10x.
It is clear that offers made prior to his arrival were not impressive enough, given the step function advantages that POET presents. So, what is the plan?
The Trojan Horse
The TC10x, while being developed and brought to market, is a relatively unobtrusive device that creates few waves in the industry, until that demonstrated device meets the cost, packaging and energy parameters that have been claimed. As stated by SV at 31:36 of the conference call "POET’s disruptiveness is optimized in the form of VCSEL-based monolithic single-chip optical transceivers. There is no such product in the market today."
When this "Trojan Horse" is released , along with the thence much more substantiated claims that the technology will be deployed in more complex devices, including the optical/electronic functionality on a monolithic semiconductor, reality will strike the entire industry full force.
The Technological Imperative
Technological Imperative states simply that, if it is an advancement and it can be developed, it must be developed. A nice description is attached below:
http://visual-memory.co.uk/daniel/Documents/tecdet/tdet07.html
The success of the TC10x moves POET from the stature of potential technology pioneer to the semiconductor industry's technological mandate; it must be developed to its fullest potential.
Strategically, and in all likelihood within 2016, this firmly places POET in the position that has to date been promised or at least anticipated by many, that of being able to call the shots regarding whom it will do business with, and on what terms.
" POET Technologies- Becoming This Generation's Technological Imperative "
I like the sound of that.
