I think when POET reports their action plan they will announce what the offering is. Until then the only publicly disclosed optical interconnect design information we have is from the white paper which is a couple years old. http://www.poet-technologies.com/docs/Optical-Interconntion-of-High-Speed-Circuits.pdf
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POET Comparison to Competing Technology
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Competing OE Interface
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Potential OE Interface using POET
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POET Advantage
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power metrics transmit
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10 mW/channel
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2.5 mW/channel
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75% energy savings
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power metrics receive
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11 mW/channel
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3 mW/channel
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72% energy savings
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speed metrics max output
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28Gbps/channel
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100 Gbps/channel
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72%increase speed
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size
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4 VLSI chips (5mm X5 mm each) combined with commercial DBF laser in package of 3" X 1" X 1"
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single chip (5 mm X 5mm) in a standard flat package with fiber attached
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A fraction of the size
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Estimated cost
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$200
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$15
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.075 the cost
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Optical Interconnection of High Speed Circuits
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energy
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POET (near term)
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IBM (DARPA Terabus project)
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POET energy used compared to benchmark
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transmit power
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pj/bit
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0.27
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4mW @ 15 Gb/s
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55 mW @ 15Gb/s
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7.27%
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receive power
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pj/bit
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0.42
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6.3 mW @ 15 Gb/s
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67 mW @ 15 Gb/s
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9.40%
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