Of course those results were part of what POET calls their near term solution which I expect was based on 100nm
The Long Term solution improves on those metrics:
Not only would the cost of packaging this device be substantially reduced, but also would its size, weight and power consumption while the data rate continues to expand to the limits of the device performance. These metrics continue to improve with scaling of feature size from the near term values stated above towards the 40-nm node since the transmitter and receiver are directly linked to a device size rather than a circuit. Upon completion of a fully functioning optical VLSI circuit, POET would successfully address multiple high speed markets most notably the high speed processors and SoCs with embedded memory and high end optoelectronic switches.
http://www.poet-technologies.com/docs/Optical-Interconntion-of-High-Speed-Circuits.pdf
