What?
POET Longer Term
POET implements the processor by replacing all the CMOS gates with CHFET gates. The POET processor
will provide its own optical output and also performs the optical receive function so the need for a separate interface chip is no longer required. In addition, the Si carrier is no longer needed as the PCB is constructed with polymer waveguides which then are coupled to the POET output waveguides using same proprietary, (patented) interface technique as above. The polymer guides also connect to optical fiber I/O at a MT fiber ribbon cable connect conjunction with pre-installed Si connectboard are connected by waveguide to transport all high speed signals while standard PCB metal lines handle all lower speed signals. Not only will the cost of packaging this device be substantial but also will its size, weight and power consumption while the data rate continues to expand to the limits of the device performance. These metrics continue to improve with scaling of feature size from the near term values stated above towards the 20nm node since the transmitter and receiver are directly linked to a device size rather than a circuit. Upon completion of a fully functioning optical VLSI circuit, POET will successfully address multiple high speed markets most notably the high processor with embedded memory, the high end optoelectronic switch and the single chip smart
phone/tablet.
