From the link posted earlier by terfly...
http://www.synopsys.com/Company/AboutSynopsys/Pages/CompanyProfile.aspx
I found the following excerpt interesting.
Advanced Design at Every Process Node
"Innovation drives the semiconductor industry to constantly push the boundaries of what is possible, and there is much excitement about doing advanced designs at the emerging process technologies such as FinFET. Companies that can justify the additional cost are moving to the emerging nodes. At the same time, according to International Business Strategies (IBS), more than 80% of design starts are at 65 nanometers and above, and according to VLSI Research, approximately half of the wafers are manufactured at 65 nanometers and above. So does that mean only a very small segment of the industry is doing advanced design? No, it underscores the fact that advanced design is also being done on the established process nodes and that the technologies and methodologies developed to design at the emerging nodes also deliver tremendous benefits for designs being done at the established nodes. Examples include low power techniques that enable lower cost, ultra-low power solutions and routing technologies that use fewer layers, which results in fewer violations and brings higher-quality chips to market more quickly."
When I read the stats indicated above for 65 nm scaling, it made me wonder about the reality of node size requirements and whether there is a need for POET to be anywhere near the smaller sizes that the industry is continually working toward.
Given the targets indicated by today's news release "The "3rd party foundry" will also assist the POET team in shrinking the 100-nm PET devices and process to a 40-nm feature size", we are in the right place at the right time. At 40 nm POET will be at or beyond the current industry norm.
To be effective, PET/POET does not have driven to the smaller bleeding-edge sizes we keep hearing about in all of the marketecture that is published. PET/POET customers will realize the power/performance benefits at the current nominal industry node sizes.
This is a big plus for timing.
They will get to more scaling when they need to. They just don't need to in the near term.
Just a late evening thought ;)
GLTA
